ELECTRICAL SCIENCE II - 2019/0

Module Overview

Expected prior/parallel learning: None

Module purpose: All modern electronic devices make use of transistor technology and their future developments, via Moore’s Law and beyond, are fundamentally linked to device architecture. This module will introduce modern CMOS transistor structures and link to the operation for integrated circuits and modern memory devices. The module will also show how electric and magnetic fields can be unified within Maxwell’s equations to produce electromagnetic theory and solve common problems.

Module provider

Electrical and Electronic Engineering

Module Leader

CAREY David (Elec Elec En)

Number of Credits: 15

ECTS Credits: 7.5

Framework: FHEQ Level 5

Module cap (Maximum number of students): N/A

Module Availability

Semester 2

Prerequisites / Co-requisites

None.

Module content

Indicative content includes the following.

Part A - Digital Integrated Circuits (Dr David Carey)

1. 
   Introduction, Moore’s Law and engineering overview. Logic Inversion and the voltage transfer characteristic. Complementary switches.
   


2. 
   The MOSFET transistor: Structure, operation and electrical characteristics. Process and Device transconductance parameters.
   


3. 
   The CMOS inverter: Static and dynamic performance and their relationship to structure, transistor operating regimes. Design criteria including matched transistors, propagation delay and transistor buffering, Power-delay and Energy-delay product, Introduction to device scaling.
   


4. 
   CMOS Combinational Logic: NOR, NAND implementation. Transistor sizing design rules. CMOS transmission gate and CMOS Schmitt trigger gate.
   


5. 
   Alternatives to CMOS Logic: Ratioed and ratioless design, pseudo-NMOS and dynamic logic CMOS.
   


6. 
   Sequential CMOS Logic: Bistable circuits, CMOS implementation of flip-flop and counters.
   


7. 
   CMOS based memory: Static random access memory (6T-SRAM). Structure and operation Dynamic RAM memory cell.
   


8. 
   MOSFET based memory: Programmable Read Only Memory (PROM), Erasable PROM (EPROM), Electrically Erasable (E2PROM) and Flash memories.
   


9. 
   Interconnects: models and sources of delay.
   


10. 
    Revision sessions will also be included.
    
     
    
    Part B - Electromagnetic Theory (Professor Ravi Silva)
    

1. 
   Principle of superposition, grad V, del operator, free charges, conductors, electric flux density D, Gauss’ law
   


2. 
   Point form of Gauss' law, Laplace’s equation
   


3. 
   Capacitance, dielectrics, polarisation, permittivity, loss mechanisms in materials
   


4. 
   Magnetic field and flux density B, permeability, ferromagnetic materials.
   


5. 
   B-H loop, loss mechanisms, magnetic circuits
   


6. 
   Ampere's circuital law, H inside and outside a conductor, point form and curl H
   


7. 
   Boundary conditions for magnetic fields
   

Assessment pattern

Alternative Assessment

Not applicable: students failing a unit of assessment resit the assessment in its original format.

Assessment Strategy

The assessment strategy for this module is designed to provide students with the opportunity to demonstrate the learning outcomes.

The 2 hour written examination will assess knowledge of fundamental material properties and their behaviour in electric or magnetic fields; allow the student to demonstrate an ability to perform numerical calculations of key material and device parameters. The assignment will assess the student’s ability to research into CMOS electronic devices.

Thus, the summative assessment for this module consists of the following:

• 
  A 2-hour closed book written examination
  

• 
  For the module, students will receive formative assessment/feedback in the following ways.
  


• 
  During lectures, by question and answer sessions
  


• 
  During tutorials/tutorial classes
  


• 
  By means of unassessed tutorial problem sheets (with answers/model solutions) provided in the revision guide
  


• 
  Via the marking of written reports
  


• 
  Via assessed coursework
  

Module aims

• There are two main aims associated with this module. The first is to introduce transistor structure and to show how the operation and electrical characteristics can be related to both current and future device architectures and material choice. The second aim is to show electromagnetic theory can be applied in radio frequency, high speed digital and microwave engineering and product design at circuit level.There are two main aims associated with this module. The first is to introduce transistor structure and to show how the operation and electrical characteristics can be related to both current and future device architectures and material choice. The second aim is to show electromagnetic theory can be applied in radio frequency, high speed digital and microwave engineering and product design at circuit level.

Learning outcomes

Methods of Teaching / Learning

The learning and teaching strategy is designed to achieve the following aims.

1. Through the introduction of the key digital engineering and electromagnetic concepts, representative examples and in-class calculations, the students will be able to relate device structure to electrical characteristics.

2. Through the introduction, discussion and in-class examples of different transistor and device arrangements, students will be able to design networks to perform logical operations.

3. Through the use of a revision guide consisting of about 30 questions with full solutions, student will be able to pace their own learning in parallel with the lecture course.

4. Through a series of in-class formative tests, students will be able to readily judge their own progress in identify any gaps in their knowledge.

 

Learning and teaching methods include the following.

• 
  Lectures and class discussions, 27 hours (spread over 10 weeks)
  


• 
  Formative feedback sessions 3 hours (spread over 10 weeks)
  


• 
  Revision sessions 3 hours (week 11)
  

Indicated Lecture Hours (which may also include seminars, tutorials, workshops and other contact time) are approximate and may include in-class tests where one or more of these are an assessment on the module. In-class tests are scheduled/organised separately to taught content and will be published on to student personal timetables, where they apply to taken modules, as soon as they are finalised by central administration. This will usually be after the initial publication of the teaching timetable for the relevant semester.

Reading list

https://readinglists.surrey.ac.uk
Upon accessing the reading list, please search for the module using the module code: EEE2045

Programmes this module appears in

Please note that the information detailed within this record is accurate at the time of publishing and may be subject to change. This record contains information for the most up to date version of the programme / module for the 2019/0 academic year.