CIRCUITS, CONTROL AND COMMUNICATIONS - 2021/2
Module code: EEE2033
Module Overview
Expected prior learning: Learning equivalent to Year 1 of EE Programmes.
Module purpose: This module is divided into two parts (Circuit & Control Systems and Communications & Networking) each of which build on the concepts and tools introduced in Year 1.
Module provider
Computer Science and Electronic Eng
Module Leader
FOH Chuan (Elec Elec En)
Number of Credits: 15
ECTS Credits: 7.5
Framework: FHEQ Level 5
Module cap (Maximum number of students): N/A
Overall student workload
Independent Learning Hours: 98
Lecture Hours: 11
Tutorial Hours: 11
Guided Learning: 10
Captured Content: 20
Module Availability
Semester 1
Prerequisites / Co-requisites
None.
Module content
Indicative content includes the following.
Part A – Circuit & Control Systems (Dr. Neil Emerson)
[1 - 4] Complex frequency analysis: Poles and zeros, natural response, forced and complete
response, transfer functions. Laplace transforms.
[5 - 6] Frequency response, filter circuits, filter response from poles and zeros, Bode plots.
[7 - 9] System modelling and analysis: Time and complex frequency domain modelling of
linear systems, transfer functions, system modes and stability, step responses of 1st and 2nd order systems.
[10 - 11] Introduction to control principles, the Laplace transform, poles and stability.
[12 - 13] Feedback: Advantages of closed-loop control, sensitivity analysis, examples of feedback systems.
[14 - 15] Simple methods of feedback design: Steady-state error and integral action, proportional plus integral (PI) controllers, position control systems and derivative action.
[16 - 17] Revision
Part B - Communications & Networking (Dr. Chuan Heng Foh)
[1 - 6] Revision of Fourier Transform; Elements of modulation: Amplitude Modulation, Frequency Modulation and Digital Modulation.
[7 - 10] Introduction to Networking, Concept of Protocols, OSI reference model and data link layer.
[11 - 15] Introduction to Internet technology (including IP protocol, IP addressing, TCP, UDP).
[16] Revision
Assessment pattern
| Assessment type | Unit of assessment | Weighting |
|---|---|---|
| Examination Online | 4HR ONLINE (OPEN BOOK) EXAM | 100 |
Alternative Assessment
Not applicable: students failing a unit of assessment resit the assessment in its original format.
Assessment Strategy
The assessment strategy for this module is designed to provide students with the opportunity to demonstrate that they have achieved all the intended learning outcomes. The summative assignments are designed to encourage the students to come prepared in every lecture and free up the time for class discussions, enquiry based learning and formative feedback in the class. The written exam will assess their understanding of analysis techniques for 1st and 2nd order circuits and systems. The exam will also assess their conceptual understanding and ability to give arguments in favour of specific design choices for the communication links and networks. This exam will also assess their abilities to design as well as analyse the control systems. The exam will include a combination of conceptual questions, numerical problems and design problems to assess the student understanding.
Thus, the summative assessment for this module consists of the following.
- Two Surrey Learn based assignments. Expected time to complete the assignment is 5 hours of guided study and 3 hours of written work to be submitted through SurreyLearn. These assignments will be due according to the following schedule:
- Assignment 1: due week 5
- Assignment 2: due week 9
- 4-hour, online open-book examination at the end of the module teaching during the examination week
Any deadline given here is indicative. For confirmation of exact dates and times, please check the Departmental assessment calendar issued to you.
Formative assessment and feedback
For the module, students will receive formative assessment/feedback in the following ways.
- During lectures, by question and answer sessions
- During tutorials/tutorial classes
- By means of unassessed tutorial problem sheets (with answers/model solutions)
Module aims
- the engineering and scientific context of the concepts introduced
- how the concepts explain circuit and system behaviour
- how to use this knowledge for circuit, control and communication system design
Learning outcomes
| Attributes Developed | ||
| 001 | Model simple physical systems in the time and complex frequency domains. | KC |
| 002 | Apply simple methods to the design of systems with feedback. | CP |
| 003 | Use Laplace transforms, differential equations, transfer functions and block diagrams to analyse simple control systems. | CP |
| 004 | Develop a working knowledge of the properties of signals and modulation schemes. | K |
| 005 | Explain the basic concepts underlying the design and operation of the communication networks. | K |
Attributes Developed
C - Cognitive/analytical
K - Subject knowledge
T - Transferable skills
P - Professional/Practical skills
Methods of Teaching / Learning
The learning and teaching strategy is designed to provide useful pointers for deeper learning of the topics listed in the module content. This is achieved through a series of lectures and other learning material like slide-sets, notes, online videos, tutorial sheets with model solutions, numerical and design problems with model solutions. Students are encouraged to do pre-session preparation and attempt the assignments on SurreyLearn. Class discussions are used to identify any difficulties faced by the learners and then provide more learning material using online resources at SurreyLearn system.
Learning and teaching methods include the following.
- Lectures: 3 one-hour lecture sessions per week x 11 weeks
- Two SurreyLearn based assignments to guide the students to prepare before the lecture sessions (each assignment requiring 5 hours of guided study and 3 hours of written work)
- Class discussion: Average 20 minutes every week during the lectures
- Online vidoes, notes, tutorials with model solutions and other learning materials
Indicated Lecture Hours (which may also include seminars, tutorials, workshops and other contact time) are approximate and may include in-class tests where one or more of these are an assessment on the module. In-class tests are scheduled/organised separately to taught content and will be published on to student personal timetables, where they apply to taken modules, as soon as they are finalised by central administration. This will usually be after the initial publication of the teaching timetable for the relevant semester.
Reading list
https://readinglists.surrey.ac.uk
Upon accessing the reading list, please search for the module using the module code: EEE2033
Programmes this module appears in
| Programme | Semester | Classification | Qualifying conditions |
|---|---|---|---|
| Electronic Engineering with Computer Systems BEng (Hons) | 1 | Compulsory | A weighted aggregate mark of 40% is required to pass the module |
| Electronic Engineering BEng (Hons) | 1 | Compulsory | A weighted aggregate mark of 40% is required to pass the module |
| Electrical and Electronic Engineering BEng (Hons) | 1 | Compulsory | A weighted aggregate mark of 40% is required to pass the module |
| Electronic Engineering with Nanotechnology BEng (Hons) | 1 | Compulsory | A weighted aggregate mark of 40% is required to pass the module |
| Electronic Engineering with Nanotechnology MEng | 1 | Compulsory | A weighted aggregate mark of 40% is required to pass the module |
| Electronic Engineering with Space Systems BEng (Hons) | 1 | Compulsory | A weighted aggregate mark of 40% is required to pass the module |
| Electronic Engineering with Space Systems MEng | 1 | Compulsory | A weighted aggregate mark of 40% is required to pass the module |
| Electronic Engineering with Computer Systems MEng | 1 | Compulsory | A weighted aggregate mark of 40% is required to pass the module |
| Electronic Engineering MEng | 1 | Compulsory | A weighted aggregate mark of 40% is required to pass the module |
| Computer and Internet Engineering BEng (Hons) | 1 | Optional | A weighted aggregate mark of 40% is required to pass the module |
| Electrical and Electronic Engineering MEng | 1 | Compulsory | A weighted aggregate mark of 40% is required to pass the module |
| Computer and Internet Engineering MEng | 1 | Optional | A weighted aggregate mark of 40% is required to pass the module |
Please note that the information detailed within this record is accurate at the time of publishing and may be subject to change. This record contains information for the most up to date version of the programme / module for the 2021/2 academic year.