COMPUTER ALGORITHMS AND ARCHITECTURE - 2021/2
Module code: EEE2048
In light of the Covid-19 pandemic, and in a departure from previous academic years and previously published information, the University has had to change the delivery (and in some cases the content) of its programmes, together with certain University services and facilities for the academic year 2020/21.
These changes include the implementation of a hybrid teaching approach during 2020/21. Detailed information on all changes is available at: https://www.surrey.ac.uk/coronavirus/course-changes. This webpage sets out information relating to general University changes, and will also direct you to consider additional specific information relating to your chosen programme.
Prior to registering online, you must read this general information and all relevant additional programme specific information. By completing online registration, you acknowledge that you have read such content, and accept all such changes.
Module purpose: this module is organized into two parts that run concurrently. Part A introduces the students to microprocessors. This covers the key concepts in microprocessor organization and design; specifically for the instruction set, performance analysis, the arithmetic logic unit (ALU), and the processor control and data paths. Additionally, we explore common memory hierarchies and caching problems. In class problems are given as examples in design.
Part B covers the analysis, design and implementation of computer algorithms. It presents concepts and methods for the analysis of algorithms. Classic programming techniques and data-structures needed to develop efficient algorithms in C for solving logical and data-handling problems are introduced, and students will attend programming lab sessions where they have the opportunity to implement in C the algorithms that have been covered. The software development lifecycle is introduced and the various methodologies described. Techniques for the design of large and complex software are introduced through the use of UML.
Electrical and Electronic Engineering
GUILLEMAUT Jean-Yves (Elec Elec En)
Number of Credits: 15
ECTS Credits: 7.5
Framework: FHEQ Level 5
JACs code: I111
Module cap (Maximum number of students): N/A
Prerequisites / Co-requisites
Indicative content includes the following.
Part A - Microprocessor Organisation and Design
 Introduction. Computer abstractions and technology. The changing face of computing. Embedded microprocessors. Instructions: language of the computer.
[2 - 3] MIPS Instruction Set Architecture. Arithmetic instructions. Load and store instructions. Instruction formats. Decision making instructions.
 Assessing and understanding microprocessors performance. Definition of performance. Performance metrics. Benchmarks. Examples.
 Building a 32-bit arithmetic logic unit for the MIPS architecture.
[6 - 7] Simplified implementation of the MIPS datapath. Single-cycle datapath implementation. Multi-cycle approach. Control signals. Control unit implementation. Examples.
 Enhancing CPU performance with pipelining. Pipelined datapath. Pipeline control. Dependencies. Forwarding. Stalling. Branch hazards.
[9 - 10] Exploring memory hierarchy. Direct mapped cache. Memory organization. Decreasing miss ratio with associativity. Example implementation: 4-way associative cache. Virtual memory. Making address translation fast. Modern microprocessors systems. Examples.
Part B - Algorithmic Programming and Software Design
[1-3] Analysis of algorithms: characterisation of problem data-size and program running time; big- O notation; asymptotic behaviour; typical running times.
 Building code: testing and debugging
[5-7] Recursion: problem decomposition; base cases; implementation examples; run-time
tracing; program efficiency issues: iteration versus recursion; recurrence relations
[9-12] Data structures: revision of simple data-types and pointers; abstract data-types:
implementation and use of singly linked lists, doubly linked lists, stacks, queues, trees, binary trees binary search trees;
[13-14] Searching: directed and controlled scanning and implications of data ordering; hashing: hash functions and collision handling
[15-17] Sorting: elementary sort algorithms: selection, insertion, bubble; implications of initial ordering of data; quick sort; merge sort; priority queues, binary heaps and heap sort.
 Software development lifecycle: stages; methodologies.
[19-20] OO Analysis and Design: Functional modelling: use cases; Structural modelling: CRC cards, class diagrams, object diagrams; Behaviour modelling: sequence diagrams, behavioural state machine diagrams
|Assessment type||Unit of assessment||Weighting|
|Coursework||COURSEWORK (2 MARKED ITEMS)||25|
|Examination||2 HOUR CLOSED-BOOK WRITTEN EXAMINATION||75|
The assessment strategy for this module is designed to provide students with the opportunity to demonstrate the learning outcomes. The written examination will assess knowledge of design principles and features of processors, as well as the ability to write basic pseudo-assembly code for a common processor and to analyse processor and memory performance. The written examination will also assess knowledge of, and ability to describe using pseudo-code, and analyse various data structures and algorithms. The coursework will assess skills at implementing data structures and algorithms using C code, and ability to analyse those implementations. Software development lifecycle and OO analysis and design will be introduced via small-group and class discussion of a case-study of a large software system.
Thus, the summative assessment for this module consists of:
- 2 hour closed-book written examination
- Programming assignment. An assignment to implement data structures and/or algorithms using C code, and then obtain run-time results of the execution of the code, as well as analysis of those results. Deliverables are the C code as well as a report to describe the program, and detail results with analysis. Coursework is set in Week 5, and due in on Tuesday of Week 9.
Any deadline given here is indicative. For confirmation of exact dates and times, please check the Departmental assessment calendar issued to you.
Formative assessment and feedback
For the module, students will receive formative assessment/feedback in the following ways.
- During lectures, by small-group problem-solving exercises and class-discussion of solutions.
- By means of unassessed tutorial problem sheets. Solutions to these are presented during class-discussion sessions in lectures, as well as on model solutions being available on SurreyLearn.
- During supervised computer laboratory sessions
- Via assessed coursework
Via small-group and class-discussion of a large software system design
- Microprocessors have penetrated everyday life – from our smart-phones to our cars. Understanding the operations of a common microprocessor and how it is designed provides the students with skills to analyse and comments on physical processor architectures. This module aims to present the MIPS processor design and its evolution, from basic reduced instruction set languages, such as assembly, through to complex memory systems and co-processors.
- Programming is a skill which many electronic engineers find themselves needing at some point during their career, whether this be designing and building a new software system or, at the other end of the spectrum, implementing a new digital filter in software before translating it to hardware. This module will provide students with the necessary skills to be able to design and program algorithms, and to be able to analyse the performance of their algorithm.
- Students will secure programming skills learned during the previous year by implementing programs in C with more complicated requirements than previously, and learn advanced programming techniques essential to anyone wishing to pursue software development further in their career.
|001||Write basic pseudo-assembly code for a common processor (C,P).||CP|
|002||Explain the key design principles of microprocessors (C).||C|
|003||Analyse processor and memory performance (C).||C|
|004||Describe the data and control paths within a processor (K).||K|
|005||Create a simple high-level design of a large software system represented through UML models (P)||P|
|006||Analyse the processing performance of algorithms and characterise this using Big-Oh notation (C)||C|
|007||Implement solutions to some simple logical problems using recursion (P)||P|
|008||Appropriately select, and justify the selection of, data structures and algorithms for some logical problems (C)||C|
|009||Describe and program in pseudo-code some well-known abstract data types (K,P)||KP|
|010||Be able to explain the operation of some common algorithms for data handling and describe them using pseudo-code (K)||K|
|011||Be able to implement some well-known algorithms and abstract data types using C code (K,P)||KP|
C - Cognitive/analytical
K - Subject knowledge
T - Transferable skills
P - Professional/Practical skills
Overall student workload
Independent Study Hours: 107
Lecture Hours: 33
Laboratory Hours: 10
Methods of Teaching / Learning
The learning and teaching strategy is designed to achieve the following aims.
- Through the introduction, in-class exercises and computing laboratory session on “Big-Oh”, the students will be able to analyse algorithms and compare the performance of different algorithms.
- Through the introduction, in-class exercises and computing laboratory session on recursion, students will learn several algorithm design paradigms enabling them to design and implement solutions to appropriate problems.
- Through the introduction, in-class exercises and computing laboratory sessions on data structures, searching and sorting, students will learn to implement various algorithms for the solution of data-handling problems.
- The lecture booklet provides about 30 tutorials covering the full breadth of the module; students will be able to pace their own learning in parallel with the lecture course, and at various points solutions will be worked through in class-discussions, as well as being available on SurreyLearn.
- Through small-group and class discussions of a case-study of the design of a large software system, students will be introduced to the basics of software design of large systems, using a case-study of a UML design of such a system.
Learning and teaching methods include the following.
- Lectures, small-group exercises and class discussions, 30 hours (spread over 10 weeks)
- Computing laboratory sessions, 10 hours (spread over 10 weeks)
Revision sessions 3 hours (week 11)
Indicated Lecture Hours (which may also include seminars, tutorials, workshops and other contact time) are approximate and may include in-class tests where one or more of these are an assessment on the module. In-class tests are scheduled/organised separately to taught content and will be published on to student personal timetables, where they apply to taken modules, as soon as they are finalised by central administration. This will usually be after the initial publication of the teaching timetable for the relevant semester.
Programmes this module appears in
|Electronic Engineering with Computer Systems BEng (Hons)||1||Compulsory||A weighted aggregate mark of 40% is required to pass the module|
|Electronic Engineering BEng (Hons)||1||Compulsory||A weighted aggregate mark of 40% is required to pass the module|
|Electrical and Electronic Engineering BEng (Hons)||1||Compulsory||A weighted aggregate mark of 40% is required to pass the module|
|Electronic Engineering with Nanotechnology BEng (Hons)||1||Compulsory||A weighted aggregate mark of 40% is required to pass the module|
|Electronic Engineering with Nanotechnology MEng||1||Compulsory||A weighted aggregate mark of 40% is required to pass the module|
|Electronic Engineering with Space Systems BEng (Hons)||1||Compulsory||A weighted aggregate mark of 40% is required to pass the module|
|Computer and Internet Engineering MEng||1||Compulsory||A weighted aggregate mark of 40% is required to pass the module|
|Electronic Engineering with Space Systems MEng||1||Compulsory||A weighted aggregate mark of 40% is required to pass the module|
|Electrical and Electronic Engineering MEng||1||Compulsory||A weighted aggregate mark of 40% is required to pass the module|
|Electronic Engineering with Computer Systems MEng||1||Compulsory||A weighted aggregate mark of 40% is required to pass the module|
|Electronic Engineering MEng||1||Compulsory||A weighted aggregate mark of 40% is required to pass the module|
|Computer and Internet Engineering BEng (Hons)||1||Compulsory||A weighted aggregate mark of 40% is required to pass the module|
Please note that the information detailed within this record is accurate at the time of publishing and may be subject to change. This record contains information for the most up to date version of the programme / module for the 2021/2 academic year.