Surrey University Stag


Module code: EEE2045

Module Overview

Expected prior/parallel learning: None

Module purpose: All modern electronic devices make use of transistor technology and their future developments, via Moore’s Law and beyond, are fundamentally linked to device architecture. This module will introduce modern CMOS transistor structures and link to the operation for integrated circuits and modern memory devices. The module will also show how electric and magnetic fields can be unified within Maxwell’s equations to produce electromagnetic theory and solve common problems.

Module provider

Computer Science and Electronic Eng

Module Leader

CAREY David (CS & EE)

Number of Credits: 15

ECTS Credits: 7.5

Framework: FHEQ Level 5

JACs code: H600

Module cap (Maximum number of students): N/A

Overall student workload

Independent Learning Hours: 91

Lecture Hours: 30

Tutorial Hours: 6

Guided Learning: 12

Captured Content: 11

Module Availability

Semester 2

Prerequisites / Co-requisites


Module content

Indicative content includes the following.

Part A - Digital Integrated Circuits (Prof. David Carey)

  1. Introduction, Moore’s Law and engineering overview. Logic Inversion and the voltage transfer characteristic. Complementary switches.

  2. The MOSFET transistor: Structure, operation and electrical characteristics. Process and Device transconductance parameters.

  3. The CMOS inverter: Static and dynamic performance and their relationship to structure, transistor operating regimes. Design criteria including matched transistors, propagation delay and transistor buffering, Power-delay and Energy-delay product, Introduction to device scaling.

  4. CMOS Combinational Logic: NOR, NAND implementation. Transistor sizing design rules. CMOS transmission gate and CMOS Schmitt trigger gate.

  5. Alternatives to CMOS Logic: Ratioed and ratioless design, pseudo-NMOS and dynamic logic CMOS.

  6. Sequential CMOS Logic: Bistable circuits, CMOS implementation of flip-flop and counters.

  7. Delay in CMOS circuits: normalised delay, multistage logic networks, design for minimised delay

  8. CMOS based memory: Memory classification, Static random access memory (6T-SRAM). Double Data Rate Synchronous Dynamic Random-Access Memory (DDR SDRAM), Structure and operation Dynamic RAM memory cell.

  9. MOSFET based memory: Programmable Read Only Memory (PROM), Erasable PROM (EPROM), Electrically Erasable (E2PROM) and Flash memories.

  10. Interconnects: sheet resistance, models and sources of delay.

  11. Revision sessions will also be included.


Part B - Electromagnetic Theory , Dr Raffaella Guida

  1. Introduction to EM and mathematical operators (Vector algebra and differential calculus)

  2. Electrostatics. The Electric field and the Coulomb’s law. Principle of Superposition. Point charges and distributions of charge.

  3. Gauss Law in integral and differential form. Applications of the Gauss Law.

  4. Electric potential, Poisson and Laplace equations. Work/energy in electrostatics. Capacitors, dielectrics, permittivity.

  5. Magnetostatics. Magnetic field and force. Lorentz force law. Work of a magnetic force.

  6. Currents and steady currents. Continuity equation. Bio-Savart Law.

  7. Curl of B and Ampère Law. Divergence of B

  8. Magnetic vector potential, magnetization, bound charges and currents, free charges and currents. Ferromagnetism and hysteresis.

  9. Ohm’s Law. Electromotive force (emf) and motional emf. Faraday’s Law.

  10. Electrodynamics laws, before and after Maxwell. Boundary conditions. Maxwell equations

  11. EM Wave propagation. Propagation in a Conducting medium, attenuation, skin depth. Propagation in a Dielectric medium. Reflection and Transmission of EM waves.

Assessment pattern

Assessment type Unit of assessment Weighting

Alternative Assessment

Not applicable: students failing a unit of assessment resit the assessment in its original format.

Assessment Strategy

The assessment strategy for this module is designed to provide students with the opportunity to demonstrate the learning outcomes.

The open book written examination will assess knowledge of fundamental material properties and their behaviour in electric or magnetic fields; allowing the student to demonstrate an ability to perform numerical calculations of key material and device parameters. The assignment will also assess the student’s ability to research into CMOS electronic devices.

Thus, the summative assessment for this module consists of an open book written examination.

Formative assessment and feedback

For the module, students will receive formative assessment/feedback in the following ways.

  • During lectures via questions and answers

  • During tutorial problem classes

  • By means of unassessed tutorial problem sheets (with answers/model solutions)

Module aims

  • This module builds upon EEE1034 Electrical Science I which introduces students to electronic materials and transistors (part A) to fields and charges (part B). There are two main aims associated with this module. The first is to how the structure and architecture of modern energy efficient transistors influences their operation and electrical characteristics. The second aim is to show electromagnetic theory can be applied in radio frequency, high speed digital and microwave engineering and product design at circuit level.
  • Part A of the module feeds into Semiconductor Devices and Optoelectronics (EEE3041) and part B into rf and microwave fundamentals (EEE3032).
  • The module also aims to provide opportunities for students to learn about the Surrey Pillars listed below.

Learning outcomes

Attributes Developed
001 Evaluate how the structure of field effect transistor-based influences their electrical characteristics. . KC C2
002 Design and evaluation of field effect transistor-based devices for user performance specifications. CPT C5
003 Demonstrate an understanding of the electric and magnetic field response of materials. KC C2
004 Demonstrate an understanding of the electromagnetic wave propagation in different media. KCT C3

Attributes Developed

C - Cognitive/analytical

K - Subject knowledge

T - Transferable skills

P - Professional/Practical skills

Methods of Teaching / Learning

Learning and teaching methods include the following.
The methods of learning at teaching in this module reflect the strong functional design component in part A and the extensive use of mathematical concepts in Part B.  As such the approach to learning and teaching is to

(i) provide extensive in-class sessions of lectures to provide students opportunities to learn about design concepts of modern devices

(ii) provide in-class lectures and online resources showing the mathematical development of proofs of important concepts

(iii) Problem solving classes with previously released problems allowing students to master their ability at device and other calculations; model solutions will be released via SurreyLearn.

(iv) Opportunities for in-class discussions of the topic taught

(v) Revision sessions of problem sheets and past examination papers

Indicated Lecture Hours (which may also include seminars, tutorials, workshops and other contact time) are approximate and may include in-class tests where one or more of these are an assessment on the module. In-class tests are scheduled/organised separately to taught content and will be published on to student personal timetables, where they apply to taken modules, as soon as they are finalised by central administration. This will usually be after the initial publication of the teaching timetable for the relevant semester.

Reading list
Upon accessing the reading list, please search for the module using the module code: EEE2045

Other information

Energy efficiency is at the heart of modern electronic devices and this module will introduce students to sustainable electronic devices with user design requirements; this is aligned to UNSDG no. 7. The module provides ample opportunity for students to demonstrate their mastery of design and calculations which will aid the student’s employability. Students’ resourcefulness and resilience will be enhanced as the they will need to think critically and exercise engineering judgment of some of the underlying assumptions they would need to employ in advanced calculations.

Programmes this module appears in

Programme Semester Classification Qualifying conditions
Electronic Engineering BEng (Hons) 2 Compulsory A weighted aggregate mark of 40% is required to pass the module
Electrical and Electronic Engineering BEng (Hons) 2 Compulsory A weighted aggregate mark of 40% is required to pass the module
Electronic Engineering with Nanotechnology BEng (Hons) 2 Compulsory A weighted aggregate mark of 40% is required to pass the module
Electronic Engineering with Nanotechnology MEng 2 Compulsory A weighted aggregate mark of 40% is required to pass the module
Electrical and Electronic Engineering MEng 2 Compulsory A weighted aggregate mark of 40% is required to pass the module
Electronic Engineering MEng 2 Compulsory A weighted aggregate mark of 40% is required to pass the module
Electronic Engineering with Computer Systems MEng 2 Compulsory A weighted aggregate mark of 40% is required to pass the module
Electronic Engineering with Computer Systems BEng (Hons) 2 Compulsory A weighted aggregate mark of 40% is required to pass the module

Please note that the information detailed within this record is accurate at the time of publishing and may be subject to change. This record contains information for the most up to date version of the programme / module for the 2024/5 academic year.